74593 IC BIN CNTR W/INPUT-REG

The ‘LS592 comes in a 16-pin package and consists of a parallel input, 8-bit storage
register feeding an 8-bit binary counter. Both the register and the counter have
individual positive-edge-triggered clocks. In addition, the counter has direct load and
clear functions. A low-going RCO pulse will be obtained when the counter reaches the hex word
FF. Expan­ sion is easily accomplished for two stages by connecting RCO of the first stage
to CCKEN of the second stage. Cascading for larger count chains can be accomplished by
connecting RCO of each stage to CCK of the following stage.

The ‘LS593 comes in a 20-pin package and has all the features of the ‘LS592
plus 3-state 1/0, which provides parallel counter outputs. The tables below show the operation
of the enable !CCKEN, CCKEN) inputs. A register clock enable (ACKEN) is also
provided.